Architecting Advanced Technologies: Not All FinFETs are Created Equal

By Gregg Bartlett

The explosion of popularity in mobile computing has sent shockwaves through the entire semiconductor ecosystem. Gartner researchers predict that smartphone shipments will jump from 178 million in 2009 to more than 800 million in 2013. And it’s not just the increasing number of smartphones that is changing the landscape, but it’s also the way people are using them. According to a recent study by KPCB, the average smartphone user is now spending approximately one hour per day—nearly 60% of the time on their device—on activities other than telephony and email, such as web browsing, map software, games, and social networking.

Of course this appetite for computation-intensive tasks is driving demand for more powerful processors, but battery Iife still remains a top priority, and battery technology has not kept up the pace with the increasing demand of smart mobile computing. This puts the responsibility for innovation squarely on the shoulders of Technology Architects and SoC designers, who have been forced to completely rethink their approach to delivering end-product value with each new technology generation.

At GLOBALFOUNDRIES, we saw the industry need for a new approach to technology definition to keep up with the rapidly changing needs of the market. As we got to 20nm and beyond, we saw a major shift: for the first time in the history of our industry, mobile SoCs are beginning to drive leading-edge process technology instead of discrete CPUs and GPUs. With this change in the market, we had to look at a different set of metrics to determine the value proposition of each new technology node. For example, the “performance at all costs” mentality that drove much of the innovation in recent years will not work in this brave new world. Neither will a myopic focus on just making better and more transistors to squeeze onto a piece of silicon.

Mobile SoCs require a delicate balance between performance and power consumption, while minimizing both die size and cost. At the same time, technologies must be architected for optimum manufacturability and ease of design, to ensure the critical value of Advanced Technology elements are reflected in the SoC Product Value, without getting lost in translation. Additionally, consideration needs to be given to SoC-level concerns beyond the transistor architecture, such as overall system-level performance and specific mobile applications needs.

The transition from 20nm to 14nm represents an important inflection point, and at GLOBALFOUNDRIES we have introduced a new technology that takes full advantage of the latest advances in device architecture while keeping the bigger SoC product-level picture in view. With our new 14nm-XM offering, we have accelerated our leading-edge roadmap to deliver a technology optimized for the fast-growing smart mobile computing market. 14nm-XM will give customers the performance and power benefits of three-dimensional “FinFET” transistors with less risk and a faster time-to-market, helping the fabless ecosystem maintain its leadership in mobility while enabling a new generation of smart mobile devices. The XM stands for “eXtreme Mobility,” and it is a cost-effective and power-optimized architecture that is ideally suited for mobile SoC designs, providing a whole product solution from the transistor all the way up to the system level.

Our 14nm-XM offering is based on a modular technology architecture that uses a 14nm FinFET device combined with elements of our 20nm-LPM process, which is well on its way to production. It leverages the proven Middle of Line (MOL) from 20nm-LPM with density and cost optimized design rules to enable 8T standard cells. Our 80nm single-patterned Back End of Line (BEOL) capability combined with high density 64nm 1X layer offers unique cost advantage and competes with industry-leading 14nm technology. Combine this with our unique “fin-friendly” layout rules for faster porting of existing design IP, and 14nm-XM is able to leverage the maturity of the 20nm-LPM technology to give SoC designers a smooth transition to FinFETs on an accelerated schedule.

Another critical aspect of delivering a fully SoC-optimized solution is the ability to leverage the entire ecosystem of industry expertise, from EDA and design solutions partners to IP providers. FinFET technology comes with new considerations, especially for the SoC design community.  Our process R&D and technology architecture teams have been working closely with both internal design teams as well as design ecosystem partners to co-optimize the technology and design environments to ensure remove all design barriers on the foundry industry’s first generation FinFET technology. In fact, we recently announced a new multi-year agreement with our longstanding partner ARM to jointly deliver optimized SoC solutions for advanced ARM mobile processor designs on FinFET technologies. You can read more about this partnership in a recent blog written by my colleague Mike Noonen, our executive vice president of marketing and sales.

As Mike noted, this new industry landscape presents a number of challenges beyond the technical hurdles of shrinking transistors. I believe that re-thinking our approach to technology architecture, while driving earlier and deeper collaboration across the entire ecosystem, will allow us to overcome these challenges and continue to deliver on the promise of Moore’s Law. The ultimate goal is to enable our customers to succeed in their respective businesses. And based on input from customers and partners, 14nm-XM is well positioned to fulfill this critical objective.

Gregg Bartlett is Chief Technology Officer at GLOBALFOUNDRIES. He is responsible for the company technology strategy, research, technology partnerships and alliances, and packaging technology development. He serves as the company’s primary spokesperson on technology matters. 

5 thoughts on “Architecting Advanced Technologies: Not All FinFETs are Created Equal

  1. Pingback: Globalfoundries Challenges Intel in 14nm Chip Manufacturing - Fundamental Technology Partners Inc.

    • Doesn’t slide 7 show a FinFET in bulk technology? SOI would be an entire oxide layer below the fin decoupling it from the substrate.

      • You’re right — no insulator under the device in this illustration (which is not to say there couldn’t be, right?). Gregg, will there be an SOI option?

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