Foundry 2.0: New White Paper and Video Interview with CEO Ajit Manocha

Today our friends over at VLSI Research released two thought-provoking commentaries on the evolution of the foundry industry.

The first is a video featuring GLOBALFOUNDRIES CEO Ajit Manocha being interviewed by G. Dan Hutcheson, VLSI’s chairman and CEO. In the video, which can be viewed on the weSRCH.com web site, these two industry veterans discuss the challenges facing the semiconductor industry and why a new foundry model is needed to enable continued innovation.

Today VLSI also released a new white paper by Hutcheson that delves into the historical development of the semiconductor foundry business model, how things went wrong in the 2000s, and why a new model of foundry partnership is needed—precisely the “Foundry 2.0” model that Manocha has called for since taking the helm at GLOBALFOUNDRIES. The white paper can be downloaded here (registration required).

After discussing the inception of the industry in the 1980s, Hutcheson reviews some of the key infrastructural shifts in the early 1990s that led to the rapid growth of the foundry segment—the most important of which was the rising cost of leading-edge semiconductor fabs. “The foundry movement hit high gear in the early nineties, when the cost of a fab was just passing the one-billion dollar mark,” Hutcheson writes. “The cost of a fab was roughly rising at about half the rate of Moore’s Law, or a doubling every two nodes. Moreover, it was not just the cost of building a new fab, because existing ones had to be upgraded every node for a chip maker to stay in the game. The incremental cost of keeping a fab up-to-date was a growing capital burden, which became another big barrier to entry.”

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But just as the foundry industry was beginning to hit its stride, the fast-moving semiconductor marketplace continued to evolve. “By 2000, the foundry business model had moved from an idea for companies who could not afford fabs to being front and center in the mainstream of manufacturing,” Hutcheson writes. “Many had come to believe the foundry was the future of manufacturing. But the nature of the business was changing as storm clouds formed on the horizon. These storm clouds grew darker as conflicting market and technology pressures were forcing change.” Hutcheson reviews these market and technology pressures, which include rising competition, increasing emphasis on cost, and the daunting challenges presented by new wafer sizes, transistors, and materials. All of these factors led to an erosion of trust between foundries and their customers and opened the door for some to speculate that the foundry model might be dead.

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To solve these problems, Hutcheson calls for a new working relationship that melds the seamless collaboration of an IDM with the flexibility of the fabless-foundry model. This “collaborative device manufacturing” approach must be structured to collaborate seamlessly, allowing the fabless company to innovate on the foundry’s platform as an extension of its own strategy starting early in a new process node’s development. “GLOBALFOUNDRIES, to a great extent, was perfectly positioned to address the emerging need for a new foundry model,” Hutcheson writes. “Its roots were as an IDM, having spun out from AMD in 2009. Having acquired Chartered, it also gained deep roots in the foundry 1.0 model, allowing it to bridge both worlds. Its CEO, Ajit Manocha, deeply understood the issues. . . . So it was no surprise that Manocha would be the first foundry CEO to address the issue, spelling out a new model he called Foundry 2.0.”

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Readers of this blog will be no stranger to the Foundry 2.0 concept, but Hutcheson brings a fresh interpretation as he describes the intricacies of the new business model and puts Foundry 2.0 in its proper historical context.

The Mobile Revolution: Taking it to the Next Level

By Srinivas Nori

Today our friends at ARM announced the launch of their newest processor targeted at the rapidly growing market for mid-range mobile devices. The ARM Cortex-A12 processor is expected to offer a significant performance uplift and direct upgrade path from the highly successful Cortex-A9 processor, while matching the energy-efficiency of its predecessor.

Most of the attention these days goes to the latest and greatest high-end superphones and tablets—and of course ARM has processors to serve this important segment—but the market for entry-level and mid-range smartphones is where the real growth is expected to occur in the coming years. For example, a recent report by ABI research projected that shipments of sub-$250 smartphones will grow from 259 million units in 2013 to 788 million units in 2018, at which point they will make up nearly half (46%) of the global smartphone market.

What do consumers want in an entry-level smartphone? They expect similar levels of performance and battery life as enabled by application processors for high-end smartphones, but in a more cost-effective system. Delivering this functionality is no small challenge, and it requires a tight partnership between SoC design and process technology to optimize performance, power, and cost.

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Timeline of GLOBALFOUNDRIES and ARM’s relationship

We have been collaborating for years to optimize ARM processors for GLOBALFOUNDRIES leading-edge process technology. Today, in conjunction with the launch of the Cortex-A12 processor, we announced new power, performance and cost optimized POP™ IP technology offerings for the ARM Cortex-A12 and ARM Cortex-A7 processors for our 28nm-SLP High-K Metal Gate (HKMG) process technology. You can read more here about this latest milestone in our multi-year collaboration with ARM. The upshot is that this combination of ARM’s processor IP and our leading-edge process technology will enable a new level of system performance and power efficiency with the optimum economics necessary to serve the market for mid-range mobile devices. GLOBALFOUNDRIES’ 28nm-SLP process technology and associated ARM POP IP for the Cortex-A12 processor enables up to 70 percent higher performance (measured single-thread performance) and up to 2x better power efficiency in comparison to a Cortex-A9 processor using 40nm process technology. Designers can achieve even higher performance by trading off for lower power efficiency, depending on their application needs.

But of course the technology industry continues its relentless march forward, and we have no plans to stop there. We are already collaborating to optimize ARM processor IP for our next-generation 14nm-XM technology. Our 14 nm-XM offering is based on a modular technology architecture that uses a 14nm FinFET device combined with elements of GLOBALFOUNDRIES’ proven 20 nm-LPM process, which will give SoC designers the benefits of FinFET technology with reduced risk and time-to-market. The XM stands for “eXtreme Mobility,” and it is truly optimized for mobile SoC designs.

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14XM Dual-Core Cortex-A9 PPA Proof Point. Similar results are expected for Cortex-A12

Back in February at the Common Platform Technology Forum, we announced results from the industry’s first implementation of a dual-core ARM® Cortex™-A9 processor using FinFET transistors. We found the following results for a Cortex-A9 processor implemented on 14nm-XM technology. Similar results are expected for Cortex-A12 processor implementations.

Here are the technical details:

  • High-performance, energy-efficient ARM processors implemented on 28nm-SLP typically use 12-track libraries. However at 14nm-XM FinFET technology, much higher performance and more energy-efficient ARM processors can be implemented using 9-track libraries resulting in further die-size reductions.
  • At constant power, the frequency achieved with 14nm-XM technology based implementation (using 9-track libraries) is expected to be 61% faster than the frequency achieved with 28nm-SLP technology based implementation (using 12-track libraries).
  • At constant frequency, the power consumed by 14nm-XM technology based implementation is expected to be 62% lower than the power consumed by 28nm-SLP technology based implementation.
  • The performance-power efficiency of 14nm-XM technology based implementation (expressed as DMIPs/milliwatts) is anticipated to be more than twice that of the 28nm-SLP technology based implementation, while using half the silicon area.

The mobile revolution has only just begun. We are excited to see where this dynamic industry will go next, and you can be sure we will continue collaborating with innovative partners like ARM to bring the next generation of connected devices to life.

Srinivas Nori is director, SoC innovation at GLOBALFOUNDRIES. In this role Srinivas owns the GLOBALFOUNDRIES strategy and realization for ARM ecosystem based solutions. Srinivas also oversees the exploration, identification, evaluation and collaborative offering of innovative SoC solutions.

What’s In A Name?

By Subi Kengeri

Consumers continue to demand smaller, faster and more energy-efficient electronic devices, driving the semiconductor industry to accelerate development of commercially viable chips on more advanced nodes. However, these new nodes don’t just appear by magic. It takes a great deal of careful planning to develop and deliver a process technology platform that offers competitiveness, differentiation, and manufacturability. This is the job of my team at GlobalFoundries. It always has been difficult, but the transition to 20nm and beyond presents a host of new challenges, requiring a fundamentally new approach to technology architecture and definition.

Over the past few nodes, SoC designers have grown accustomed to a roughly 30% reduction in die cost from node to node. But 20nm is the first node on which foundries introduced true double-patterning lithography, which increases manufacturing costs, largely dependent on the target application. So there has to be something else to prompt customers to adopt this new node. For example, it is critical that a technology platform deliver SoC product value and designability, and has to be optimized for the customer’s target application. At 20nm, we really began looking at the product level value for customers, which we define in terms of the optimum combination of performance, power and cost (PPC), in addition to other customer care-abouts.

We took this to a whole new level with our recently launched 14nm-XM offering. Once we had optimized PPC for our 20nm planar SoC offering, we looked at what it means to incorporate 3D FinFETs on the next node. Going from planar to FinFET gives us a step jump in performance and power, but minimal benefit in die size because we chose to use the fully optimzed middle and backend of line from 20nm-LPM. The key was to architect 14nm-XM to ensure the performance and power advantages outweigh the lack of area improvement and to ease designability on the first generation FinFET offering. Leveraging the 20nm-LPM competitive density advantages and using the most optimal 3D fin structure, we expect to get back on the historical 60% to 70% SoC PPC improvement trajectory. We also expect to see a big benefit in time-to-volume (on a node to node basis) because we will leverage key technology modules and PDKs from 20nm-LPM, which we believe will allow our customers to design concurrently and accelerate our FinFET high volume ramp by about one year.

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But one question I often get asked is, ‘Why do we call it a 14nm technology if it relies so much on 20nm?’ First of all, we are using a true 14nm-class FinFET as the front-end device, which qualifies it as a 14nm technology. But in reality the naming of nodes has become somewhat arbitrary over the past several nodes. A node used to be named based on the smallest transistor feature size, which was typically the channel length. But channel length scaling stopped at about 45nm, so the industry does not actually have a 28nm gate in a 28nm technology. Secondly, the point of moving to a new node is the delivery of value to the customer. They need to see a SoC level product value, which really translates to the PPC, and 14nm-XM offers a full node value. As long as customers see at least this level of value, they frankly don’t care what the technology is called or what is inside.

Now we need to find a way to deliver this same product level value at 10nm. The whole industry has quite a few challenges going to 10nm. FinFETs are scalable and will have a long life, but we will have already realized the performance and power value from the front-end device with 14nm-XM. We don’t expect extreme ultraviolet (EUV) lithography will be ready, at least not at the beginning of the node, which means we will have more layers that require multiple patterning and therefore significant cost increases. We will need to find other ways to provide performance and power benefits to deliver a total PPC to stay on the SoC value trajectory. We have been working on this and 7nm technologies for several years and we are very close to nailing down a competitive 10nm technology architecture. We are running 10nm devices in silicon and I am confident we will deliver the value our customers have come to expect.

For more detail on this topic, check out the recent interview with SemiMD’s Mark LaPedus, where we talk about FinFETs, EUV, and Moore’s Law.

Subramani “Subi” Kengeri is vice president of advanced technology architecture at GLOBALFOUNDRIES.

This post also appeared on Chip Design Magazine

Reshaping the Foundry Industry: Welcome to Foundry 2.0

CEO Ajit Manocha lays out winning strategy for nation’s comeback at Nikkei Electronics’ World Semiconductor Summit

GLOBALFOUNDRIES CEO Ajit Manocha spoke to a crowd of more than 200 high-ranking executives from the Japanese semiconductor industry last week at the Nikkei Electronics’ World Semiconductor Industry Summit 2013 in Tokyo. During Manocha’s presentation titled, “Reshaping the Foundry Industry: Welcome to Foundry 2.0,” he outlined the evolution and future of the foundry model, the technical and business drivers reshaping the landscape and what it will take for Japanese IDM companies to move forward. Manocha urged Japanese companies to embrace the fabless model and revise their perspective on previous paradigms.

GLOBALFOUNDRIES is committed to the idea that future success in the semiconductor industry is dependent on joint development at the technology definition level, early engagement at the architectural stage and leveraging a more integrated and cooperative ecosystem. The same theme was very present in Manocha’s speech as he emphasized that the idea that Japan’s resurgence into the semiconductor industry can be fueled collaborative device partnerships.

GLOBALFOUNDRIES recently demonstrated its commitment to collaboration at The Common Platform Technology Forum 2013, where we made a number of joint announcements with our partners. Among those collaborations include Rambus, Synopsys, Adapteva and Cyclos Semiconductor – all of which will mutually benefit GLOBALFOUNDRIES and our partners, but more importantly our customers.

You can watch Manocha’s full speech online on our YouTube channel. Important highlights include:

  • The old foundry model will no longer work with due to a slower rate of change, and inflexible methods and systems which are now required to become flexible (23:33)
  • Our vision for 2020 includes homogeneous alliances as well as heterogeneous alliances between foundries, the airline industry, banking industry, semiconductors and the biomedical field (24:53)
  • GLOBALFOUNDRIES’ acceleration of growth, viewed as a timeline (31:36):
    • From 2007 to 2012, we developed the 65-, 45-, 32- and 28nm designs
    • From 2013 to 2017, we have plans to break into the 20-, 14-, 10- and finally the 7nm design

GLOBALFOUNDRIES’ Alexie Lee Recognized for Excellence in Manufacturing

Earlier this week, the Manufacturing Institute, the Society of Manufacturing Engineers, University of Phoenix and Deloitte named GLOBALFOUNDRIES’ Alexie Lee one of the first recipients of their Women in Manufacturing STEP (Science, Technology, Engineering and Production) Awards. Honoring women who have demonstrated excellence and leadership in their careers, the announcement highlights Alexie’s achievements in manufacturing through her positive impact on both GLOBALFOUNDRIES and the industry as a whole.

Alexie Lee

In her role as General Counsel and Executive Vice President of Legal and Corporate Affairs, Alexie is responsible for litigation, intellectual property and corporate matters. Additionally, Alexie oversees worldwide corporate communications, government relations and corporate risk management and sustainability, while providing direction and counsel to the CEO, the Board of Directors and other top corporate leaders. GLOBALFOUDRIES’ growth from a one-facility operation to a company with 7 production facilities worldwide can be attributed in part to her actions and strong understanding of the importance of manufacturing to the entire economy. She adds, “I am excited about being involved in the most advanced of advanced manufacturing.  Not only is our industry vital to our nation’s strength, our products drive improvements, at times dramatic, in all our lives.”

GLOBALFOUNDRIES CEO, Ajit Manocha said, “Since helping to launch GLOBALFOUNDRIES in 2009, Alexie has exhibited a tremendous track record of execution and collaboration, helping to propel our company as one of the fastest-growing semiconductor companies in the world. Her leadership is helping GLOBALFOUNDRIES create thousands of new advanced manufacturing jobs in the U.S., and expand the high-tech manufacturing capabilities that will continue to pave the way for long-term economic growth in the U.S. We thank Alexie for her hard work and dedication and we are so proud to see her recognized with this prestigious award.”

The STEP Ahead initiative was launched to examine and promote the role of women in the manufacturing industry through recognition, research and best practices for attracting, advancing, and retaining strong female talent. A total of 122 women were honored this first year, representing a variety of companies at all levels of their manufacturing organization from the factory floor to the C-suite. Award organizers hope that by telling the stories of these women, they can help inspire the next-generation of talent to pursue careers in the industry.  The STEP Awards are also meant to empower honorees to lead in their companies, communities and networks on the importance of manufacturing and issues related to attracting, advancing and retaining strong manufacturing talent.

“The STEP Ahead initiative was founded to change perceptions of the manufacturing industry and create new opportunities for women in the sector,” said Latondra Newton, group vice president at Toyota Motor North America, Inc. and chairwoman of the STEP Ahead initiative. “This initiative is the call for action to transform the face of today’s manufacturing talent and ensure that women can contribute to the future of this industry.”

On February 5th, Alexie will join the other award recipients for a reception in Washington, D.C. where the STEP Awards program will highlight each honoree’s story, including their leadership and accomplishments in manufacturing.

SIA Celebrates its 35th Anniversary

Last week GLOBALFOUNDRIES CEO Ajit Manocha joined special guest Dean Kamen, world-renowned inventor and innovator, and other leaders of the semiconductor industry in Silicon Valley to celebrate the 35th Anniversary of the Semiconductor Industry Association.  It’s amazing how much the industry has accomplished in innovation and technological advancement over the past three and a half decades.

Ajit addressed the 35th Annual SIA Award Dinner, kicking off his role as SIA Chairman and telling the crowd, “The coming year will be critical for our industry, as we face a range of policy and regulatory challenges and opportunities that will help determine our course for the next decade and beyond,”

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The new SIA administration is coming in at a very exciting time for the industry and Ajit has several goals that include or tax reform, the environment, export controls, research funding and cybersecurity.

Tax Reform

In order to provide a level playing field with competing countries, there needs to be reform to corporate tax policies. The SIA will work to establish a globally competitive tax rate, shift to a territorial system and support incentives for research and innovation. It cannot accept changes in the current system that will ultimately make the US semiconductor industry less competitive.

By helping to advance repatriation and ensuring that profits made from these funds brought back from overseas are taxed at a much lower rate, there is a window for the semiconductor industry to be seen as a leader in this discussion for all US manufacturers.

This is a topic Ajit is particularly passionate about and wants the industry to recognize its role in helping lawmakers understand the benefits this would bring to the country going forward.

Environment

The industry has already progressed in environmental policy, but there is more that can and should be done.

“We must promote environmental and other regulations that support the semiconductor industry’s unique flexibility needs in responding to rapidly changing technologies and markets,” Ajit explained.  “I have two children, and I believe it is extremely important to ensure our future generations feel better and safer in the environment they live in.”

Export Controls

As commercially available technologies begin to run up against current limitations on radiation hardness, it is imperative that the semiconductor industry continues to work with the administration and lawmakers to ensure that a new regime is developed to addresses both industry and national security issues.

Research Funding

Ajit’s career began as a research scientist in Bell Labs and he knows what enabled the United States to lead in innovation and advanced manufacturing thus far and believes we can no longer look at being the world’s leading innovator as an option.  “We need to take advantage of the window of opportunity during the first two years of this administration before politics again take over.”

Longer term funding for SIA priority research programs is critical to sustaining the pipeline of discoveries that fuel our industry and the economy.  This includes DARPA, NIST and NSF, as well as ASIC research performed at universities and national labs

Cybersecurity

This is one of the areas that keep administration officials up at night and this issue is emerging as one of critical importance to the semiconductor industry.

While this topic encompasses many subtopics, the semiconductor industry is uniquely positioned to provide guidance in areas of mutual concern. The potential impact of IP theft on industry, financial markets and the military can be devastating. The SIA will work with the administration and lawmakers to be a resource for preventing this very serious problem.

The SIA will keep a vigilant eye on the changing dynamics in Washington DC and what other opportunities present them.

“We have always been good at keeping an ear to the ground and will need to continue to do so.”

The World’s Fastest Growing Semiconductor Company

By Mike Noonen

In the midst of an unstable world economy and an industry that is best known for its volatility, the foundry sector continues to present strong market opportunities. Thanks in large part to the continued success of the fabless business model, analysts have been predicting growth in foundry to significantly outpace the rest of the semiconductor industry as a whole.

Late last week a new study by IC Insights confirmed this trend in a big way. The firm released its projections for the top 20 leading semiconductor suppliers in 2012, and the list saw three pure-play foundries in the mix. Combined, these foundries are forecast to log a 16% increase in year-on-year sales from 2011 to 2012, which is “quite impressive considering the expected 2% decline in the worldwide semiconductor market this year,” according to IC Insights. The firm predicts strong demand over the next few years, buoyed by continued growth of fabless companies as well as the strong movement by many Integrated Device Manufacturers (IDMs) to the fab-lite business model.

This year’s study is especially significant for GLOBALFOUNDRIES. We jumped six spots to break into the top 20 for the first time, and IC Insights projects our revenue to grow 31% over 2011, which would make us the fastest growing semiconductor company in the world! IC Insights attributes this growth to our strong performance in 2012:

[I]t is obvious that GLOBALFOUNDRIES’ current spike in revenue is being driven mostly by its success in attracting new IC foundry customers . . . .  As a result of its excellent performance this year, GLOBALFOUNDRIES is forecast to replace Elpida and move into the top 20 ranking for the first time, rising from the 21st spot in 2011 to 15th place in 2012.

We could not be more pleased to see industry watchers recognizing the transformation that has taken place at GLOBALFOUNDRIES. But while we pause for a moment to celebrate, we still have much work to do to continue this momentum and execute for our customers.

Mike Noonen is Executive Vice President, Worldwide Marketing and Sales, for GLOBALFOUNDRIES. In this role, he is responsible for global customer relationships as well as all marketing, sales, customer engineering and quality functions.

Architecting Advanced Technologies: Not All FinFETs are Created Equal

By Gregg Bartlett

The explosion of popularity in mobile computing has sent shockwaves through the entire semiconductor ecosystem. Gartner researchers predict that smartphone shipments will jump from 178 million in 2009 to more than 800 million in 2013. And it’s not just the increasing number of smartphones that is changing the landscape, but it’s also the way people are using them. According to a recent study by KPCB, the average smartphone user is now spending approximately one hour per day—nearly 60% of the time on their device—on activities other than telephony and email, such as web browsing, map software, games, and social networking.

Of course this appetite for computation-intensive tasks is driving demand for more powerful processors, but battery Iife still remains a top priority, and battery technology has not kept up the pace with the increasing demand of smart mobile computing. This puts the responsibility for innovation squarely on the shoulders of Technology Architects and SoC designers, who have been forced to completely rethink their approach to delivering end-product value with each new technology generation.

At GLOBALFOUNDRIES, we saw the industry need for a new approach to technology definition to keep up with the rapidly changing needs of the market. As we got to 20nm and beyond, we saw a major shift: for the first time in the history of our industry, mobile SoCs are beginning to drive leading-edge process technology instead of discrete CPUs and GPUs. With this change in the market, we had to look at a different set of metrics to determine the value proposition of each new technology node. For example, the “performance at all costs” mentality that drove much of the innovation in recent years will not work in this brave new world. Neither will a myopic focus on just making better and more transistors to squeeze onto a piece of silicon.

Mobile SoCs require a delicate balance between performance and power consumption, while minimizing both die size and cost. At the same time, technologies must be architected for optimum manufacturability and ease of design, to ensure the critical value of Advanced Technology elements are reflected in the SoC Product Value, without getting lost in translation. Additionally, consideration needs to be given to SoC-level concerns beyond the transistor architecture, such as overall system-level performance and specific mobile applications needs.

The transition from 20nm to 14nm represents an important inflection point, and at GLOBALFOUNDRIES we have introduced a new technology that takes full advantage of the latest advances in device architecture while keeping the bigger SoC product-level picture in view. With our new 14nm-XM offering, we have accelerated our leading-edge roadmap to deliver a technology optimized for the fast-growing smart mobile computing market. 14nm-XM will give customers the performance and power benefits of three-dimensional “FinFET” transistors with less risk and a faster time-to-market, helping the fabless ecosystem maintain its leadership in mobility while enabling a new generation of smart mobile devices. The XM stands for “eXtreme Mobility,” and it is a cost-effective and power-optimized architecture that is ideally suited for mobile SoC designs, providing a whole product solution from the transistor all the way up to the system level.

Our 14nm-XM offering is based on a modular technology architecture that uses a 14nm FinFET device combined with elements of our 20nm-LPM process, which is well on its way to production. It leverages the proven Middle of Line (MOL) from 20nm-LPM with density and cost optimized design rules to enable 8T standard cells. Our 80nm single-patterned Back End of Line (BEOL) capability combined with high density 64nm 1X layer offers unique cost advantage and competes with industry-leading 14nm technology. Combine this with our unique “fin-friendly” layout rules for faster porting of existing design IP, and 14nm-XM is able to leverage the maturity of the 20nm-LPM technology to give SoC designers a smooth transition to FinFETs on an accelerated schedule.

Another critical aspect of delivering a fully SoC-optimized solution is the ability to leverage the entire ecosystem of industry expertise, from EDA and design solutions partners to IP providers. FinFET technology comes with new considerations, especially for the SoC design community.  Our process R&D and technology architecture teams have been working closely with both internal design teams as well as design ecosystem partners to co-optimize the technology and design environments to ensure remove all design barriers on the foundry industry’s first generation FinFET technology. In fact, we recently announced a new multi-year agreement with our longstanding partner ARM to jointly deliver optimized SoC solutions for advanced ARM mobile processor designs on FinFET technologies. You can read more about this partnership in a recent blog written by my colleague Mike Noonen, our executive vice president of marketing and sales.

As Mike noted, this new industry landscape presents a number of challenges beyond the technical hurdles of shrinking transistors. I believe that re-thinking our approach to technology architecture, while driving earlier and deeper collaboration across the entire ecosystem, will allow us to overcome these challenges and continue to deliver on the promise of Moore’s Law. The ultimate goal is to enable our customers to succeed in their respective businesses. And based on input from customers and partners, 14nm-XM is well positioned to fulfill this critical objective.

Gregg Bartlett is Chief Technology Officer at GLOBALFOUNDRIES. He is responsible for the company technology strategy, research, technology partnerships and alliances, and packaging technology development. He serves as the company’s primary spokesperson on technology matters. 

Innovation in Design Rules Verification Keeps Scaling on Track

By Mojy Chian

There is an interesting dynamic that occurs in the semiconductor industry when we talk about process evolution, roadmaps and generally attempt to peer into the future. First, we routinely scare ourselves by declaring that scaling can’t continue and that Moore’s Law is dead (a declaration that has happened more often than the famously exaggerated rumors of Mark Twain’s death). Then, we unfailingly impress ourselves by coming up with solutions and workarounds to the show-stopping challenge of the day. Indeed, there has been a remarkable and consistent track record of innovation to keep things on track, even when it appears the end is surely upon us.

But this time we are really serious – at 20nm, the end is near! Ok, maybe not THE end, but for sure there are some obvious things that need to change if we are to keep our record of continuous technical conquest intact. And, as with most things in this era, collaboration is the key.

Mojy Chian explains the role DFM has in keeping scaling on track.

Sure there are lots of really innovative approaches and exotic technologies being bandied about that hold the potential to keep Moore’s Law chugging along well into the future. But ironically, it’s something of an ‘old’ technology that holds significant potential to address the current issues. Design for manufacturing (DFM) has been around for a long time, most typically as a design-enabling tool delivered by EDA companies to help IC designers understand and deal with manufacturers’ geometrical design rules.  This obviously requires close interaction with the EDA people and the foundries so that design rules are accurate and practical. Literally, these are tools that guide designers with a set of geometrical constraints, necessary to guarantee yield, defined over polygonal shapes and edges in the layout. Traditionally, these design rules are binary – this works, this does not.

But something funny happened on our way past 28nm. The Y word – yield – started becoming one of the, if not the, most important factor in successful IC design. This is because of the intrinsic relationship between yield and the complexity of physical design (and the associated challenges of process-related effects).

In the past, a designer only had two primary options for identifying DFM issues: run accurate but computationally intensive simulations based on numerical algorithms, or rely on metrology measurements directly from the fab. Attempts have been made to improve upon standard DRC with additional rules, but these approaches have had mixed success. For example, some have proposed the use of restrictive design rules that only allow highly regular structures for layout, avoiding problematic two-dimensional geometries altogether. The potential drawback is that designers cannot effectively optimize their circuits to meet application requirements with overly constrained design rules.

So the manufacturers got back together with the EDA suppliers and thought about how to solve the problem. “We need to build on what we have achieved with DRC,” we agreed. “We need more.” So in our infinite wisdom, we came up with something called DRC+. The lack of creativity in the name, however, belies the innovation behind it, which is backed by several patents and reinforces the fact that GLOBALFOUNDRIES innovates in ways beyond just manufacturing process technology.

The concept we are moving towards is the reduction in the number of trade-off decisions a designer needs to make. By providing a tool that will notify the user if a forbidden shape has been used, the designer can be guided more efficiently. In addition, things need to be visually intuitive -  a picture is worth of a thousand words, even in IC design. Such a solution requires tight collaboration between the foundry, which supplies a library of yield critical patterns; EDA providers, which supply ultra-fast pattern-matching tools; and the IC design community itself which provides valuable input on design methodologies and real-world needs.

Pattern-based methodology takes hold

In a nutshell. DFM and design rule checking need to move to a pattern-based approach to provide more visibility into variability issues. Traditional DRC is shape and edge proximity based.  On top of that, we need 2D shape-based pattern-matching physical verification.

As a result, our DRC+ takes a different approach than earlier generations of DRC. Instead of restricting the flexibility of designers, the technique augments standard DRC by applying rapid two-dimensional shape-based pattern matching to identify problematic configurations that could be difficult to manufacture.

Our DRC+ platform includes a silicon verified library of “bad” patterns in a database which can be identified quickly in layout, allowing the designer to fix them. This is an on-going incremental process rather than just occurring at the end of the complete design cycle.

Thus, pattern matching with DRC+ introduces process-awareness earlier in the design process, a concept that is at the basis of the collaborative DFM platform from GLOBALFOUNDRIES.

Two rule-based flows are also part of our DFM platform. The first is yield analysis and scoring, in the form of an equation-based tool to help designers quickly analyze their design for usage of recommended rules, and prioritize fixes for the highest impact violations. The second is an automated yield enhancement “layout-fix” application, which applies recommendations without impacting overall design area.

The net result is improved variability management without sacrifices in design performance or significant impact on design productivity (DRC+ is over 10,000 times faster than printability simulation, and its detection and fixing adds very little to the overall routing runtime).

DFM is something of a broad catch-all term for a number of steps and issues involved ensuring a complex IC design can be manufactured and done in a way that is cost-effective and timely. Design rule checking is just one aspect of it, but a critical one for sure. We are proud of the innovation GLOBALFOUNDRIES continues to demonstrate in many areas, including design enablement technologies like our DRC+. In future posts I’ll explore other ideas for improving how manufacturing issues can be brought more tightly into the design process, including a concept we call Design Enabled Manufacturing (DEM). Stay tuned.

Mojy Chian is senior vice president, design enablement at GLOBALFOUNDRIES. He is responsible for global design enablement, services, and solutions and is the primary technical customer interface for the company. 

GLOBALFOUNDRIES Announces Extension to Fab 8, Adding More Space and Hundreds of New Jobs

On July 24, 2012, the third anniversary of the Fab 8 groundbreaking, GLOBALFOUNDRIES announced it is moving forward with the final construction of the extension of Module 1 at the Malta, N.Y. campus. The project will add 90,000 square feet of manufacturing capacity, bringing the total capacity for Fab 8 Module 1 to 300,000 square feet. Construction will begin in August and work is expected to be completed in December 2013.

The decision to move forward with the extension comes as a result of increased demand from customers, especially at the 28nm node. Extending the Fab 8 cleanroom is expected to enable the Fab 8 capacity to reach approximately 60,000 wafers per month and it will increase the capital budget by approximately $2.3 billion, taking the total capital budget from $4.6 billion to approximately $6.9 billion, once tools and equipment are installed.

GLOBALFOUNDRIES began construction on Fab 8 in July 2009 and began moving people and equipment into the facility in mid-2011. Initial wafer starts began earlier this year and the facility is on track to begin risk production by the end of the year, with volume production in early 2013.

“By continuing to expand our investment in the project, GLOBALFOUNDRIES is delivering more options to our global customers, while helping to redefine upstate New York as a premier hub of the global semiconductor industry, creating thousands of new advanced manufacturing jobs, and contributing billions of dollars to the regional economy,” said Eric Choh, vice president and general manager of Fab 8.

Since breaking ground on Fab 8 in 2009, GLOBALFOUNDRIES has created more than 1,500 new direct jobs, in addition to 4,300 construction-related jobs. The project is the largest private Project Labor Agreement in history, generating hundreds of millions of dollars of economic development throughout upstate New York during the worst economic downturn since the Great Depression.