Foundry 2.0: New White Paper and Video Interview with CEO Ajit Manocha

Today our friends over at VLSI Research released two thought-provoking commentaries on the evolution of the foundry industry.

The first is a video featuring GLOBALFOUNDRIES CEO Ajit Manocha being interviewed by G. Dan Hutcheson, VLSI’s chairman and CEO. In the video, which can be viewed on the weSRCH.com web site, these two industry veterans discuss the challenges facing the semiconductor industry and why a new foundry model is needed to enable continued innovation.

Today VLSI also released a new white paper by Hutcheson that delves into the historical development of the semiconductor foundry business model, how things went wrong in the 2000s, and why a new model of foundry partnership is needed—precisely the “Foundry 2.0” model that Manocha has called for since taking the helm at GLOBALFOUNDRIES. The white paper can be downloaded here (registration required).

After discussing the inception of the industry in the 1980s, Hutcheson reviews some of the key infrastructural shifts in the early 1990s that led to the rapid growth of the foundry segment—the most important of which was the rising cost of leading-edge semiconductor fabs. “The foundry movement hit high gear in the early nineties, when the cost of a fab was just passing the one-billion dollar mark,” Hutcheson writes. “The cost of a fab was roughly rising at about half the rate of Moore’s Law, or a doubling every two nodes. Moreover, it was not just the cost of building a new fab, because existing ones had to be upgraded every node for a chip maker to stay in the game. The incremental cost of keeping a fab up-to-date was a growing capital burden, which became another big barrier to entry.”

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But just as the foundry industry was beginning to hit its stride, the fast-moving semiconductor marketplace continued to evolve. “By 2000, the foundry business model had moved from an idea for companies who could not afford fabs to being front and center in the mainstream of manufacturing,” Hutcheson writes. “Many had come to believe the foundry was the future of manufacturing. But the nature of the business was changing as storm clouds formed on the horizon. These storm clouds grew darker as conflicting market and technology pressures were forcing change.” Hutcheson reviews these market and technology pressures, which include rising competition, increasing emphasis on cost, and the daunting challenges presented by new wafer sizes, transistors, and materials. All of these factors led to an erosion of trust between foundries and their customers and opened the door for some to speculate that the foundry model might be dead.

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To solve these problems, Hutcheson calls for a new working relationship that melds the seamless collaboration of an IDM with the flexibility of the fabless-foundry model. This “collaborative device manufacturing” approach must be structured to collaborate seamlessly, allowing the fabless company to innovate on the foundry’s platform as an extension of its own strategy starting early in a new process node’s development. “GLOBALFOUNDRIES, to a great extent, was perfectly positioned to address the emerging need for a new foundry model,” Hutcheson writes. “Its roots were as an IDM, having spun out from AMD in 2009. Having acquired Chartered, it also gained deep roots in the foundry 1.0 model, allowing it to bridge both worlds. Its CEO, Ajit Manocha, deeply understood the issues. . . . So it was no surprise that Manocha would be the first foundry CEO to address the issue, spelling out a new model he called Foundry 2.0.”

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Readers of this blog will be no stranger to the Foundry 2.0 concept, but Hutcheson brings a fresh interpretation as he describes the intricacies of the new business model and puts Foundry 2.0 in its proper historical context.

GLOBALFOUNDRIES Experts to Present at SEMICON West 2013

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The countdown is on for SEMICON West 2013! GLOBALFOUNDRIES is gearing up for a number of exciting events which will take place at the exhibition next week. The event, which runs from July 9-11 in San Francisco, will highlight key advances in manufacturing technologies, device architectures, lithography, MEMS, packaging and materials technology, in addition to other semiconductor research and development.

GLOBALFOUNDRIES CEO Ajit Manocha will deliver the opening keynote address on Foundry-Driven Innovation in the Mobility Era, which will cover new challenges, players and technology caused by the increasing demand for mobile devices. His presentation will take place on July 9 at 9 a.m. at the Keynote Stage in Esplanade Hall. After his keynote, Ajit will be officially awarded the “SEMI Outstanding EHS Achievement Award – Inspired by Akira Inoue,” for his contributions in the areas of environment, health and safety. To read more about the honor, check out our recent blog post that details Ajit’s leadership in the field and contributions to GLOBALFOUNDRIES’ environment and safety.

In addition to these presentations by Ajit, a number of GLOBALFOUNDRIES experts will present TechXPOTs including;

Tuesday, July 9:

Wednesday, July 10:

All GLOBALFOUNDRIES TechXPOTS will take place at the South Hall of the Moscone Center. We encourage all who are interested in these topics to register and attend to learn more about GLOBALFOUNDRIES’ development, innovation and role in the industry.

In addition to our TechXPOT presentations, GLOBALFOUNDRIES will sponsor the MIG Member Cocktail Party on July 10 at Restaurant LuLu. This event will be a great opportunity for members of the MEMS community to network, catch up with colleagues and become further immersed in SEMICON West.

We look forward to meeting and interacting with all members of the semiconductor community at the show. To register for this event, check out the SEMICON website and be sure to follow GLOBALFOUNDRIES participation on Twitter via #SEMICONWest!

This Week: GLOBALFOUNDRIES to Present at Several Industry-Focused Events

This week will be very busy for GLOBALFOUNDRIES, as we’ll be attending and speaking at a handful of industry events. We’ve included all the important details below, including dates, sessions and more. We’re excited for the upcoming week and hope you’ll join us!

The Linley Group Mobile Conference

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On Wednesday, April 17th, GLOBALFOUNDRIES Executive Vice President Mike Noonen will present at The Linley Group Mobile Conference 2013. This two-day conference will feature technical presentations addressing design issues for mobile devices such as tablet computers, smartphones, navigation devices, media players and more. In addition to hearing an overview of the market and current technologies, attendees have the opportunity to attend talks and panel discussions covering a variety of topics.

Mike Noonen will be featured during session two, on mobile SoC design, which will be moderated by Scott Gardner, senior analyst at The Linley Group. Mike’s presentation, entitled “Lessons from Barcelona: The Future of Mobile Technology is Here,” will focus on the semiconductor industry’s progress in bringing FinFET technology to the mobile SoC market, as well as recent developments in FinFET technology by GLOBALFOUNDRIES and our partners.

GSA Silicon Summit

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On April 18th, Bruce Kleinman, GLOBALFOUNDRIES’ vice president of product marketing, will moderate a panel at the GSA Silicon Summit in Mountain View, CA. This event focuses on the business and technical factors which will yield revolutionary electronic devices in the future.

Bruce’s session, “Integration Challenges and Opportunities,” will cover the need for unifying silicon technologies and changing business models to advance the future of electronic devices. Panelists include Jim Aralis (Microsemi), Dr. Misha Burich (Altera), Dr. William Chen (ASE), Steve Longoria (Soitec) and Dr. Robert Rogenmoser (SuVolta). For more updates from this event, follow the Twitter hashtag #GSAsummit.

Electronic Design Process Symposium

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Finally, on Friday, April 19th, representatives from GLOBALFOUNDRIES will participate on a panel at the 2013 Electronic Design Process Symposium (EDPS). The EDPS, which is now in its 20th year, features the “free exchange of ideas” among top industry influencers in chips and systems. GLOBALFOUNDRIES’ Fellows, Srinivasa Banna and Luigi Capodieci, will speak at 1 p.m. about FinFET foundry design enablement challenges.

Follow our Twitter and Facebook pages for more information and updates on these events.

Reshaping the Foundry Industry: Welcome to Foundry 2.0

CEO Ajit Manocha lays out winning strategy for nation’s comeback at Nikkei Electronics’ World Semiconductor Summit

GLOBALFOUNDRIES CEO Ajit Manocha spoke to a crowd of more than 200 high-ranking executives from the Japanese semiconductor industry last week at the Nikkei Electronics’ World Semiconductor Industry Summit 2013 in Tokyo. During Manocha’s presentation titled, “Reshaping the Foundry Industry: Welcome to Foundry 2.0,” he outlined the evolution and future of the foundry model, the technical and business drivers reshaping the landscape and what it will take for Japanese IDM companies to move forward. Manocha urged Japanese companies to embrace the fabless model and revise their perspective on previous paradigms.

GLOBALFOUNDRIES is committed to the idea that future success in the semiconductor industry is dependent on joint development at the technology definition level, early engagement at the architectural stage and leveraging a more integrated and cooperative ecosystem. The same theme was very present in Manocha’s speech as he emphasized that the idea that Japan’s resurgence into the semiconductor industry can be fueled collaborative device partnerships.

GLOBALFOUNDRIES recently demonstrated its commitment to collaboration at The Common Platform Technology Forum 2013, where we made a number of joint announcements with our partners. Among those collaborations include Rambus, Synopsys, Adapteva and Cyclos Semiconductor – all of which will mutually benefit GLOBALFOUNDRIES and our partners, but more importantly our customers.

You can watch Manocha’s full speech online on our YouTube channel. Important highlights include:

  • The old foundry model will no longer work with due to a slower rate of change, and inflexible methods and systems which are now required to become flexible (23:33)
  • Our vision for 2020 includes homogeneous alliances as well as heterogeneous alliances between foundries, the airline industry, banking industry, semiconductors and the biomedical field (24:53)
  • GLOBALFOUNDRIES’ acceleration of growth, viewed as a timeline (31:36):
    • From 2007 to 2012, we developed the 65-, 45-, 32- and 28nm designs
    • From 2013 to 2017, we have plans to break into the 20-, 14-, 10- and finally the 7nm design

Common Technology, Uncommon Solutions

common platformBy Mike Noonen

Collaboration has become a well-worn buzzword in our industry in recent years, and for good reason. The scale and complexity of the challenges we collectively face can only be addressed by working together across the entire semiconductor ecosystem. But while many companies are just giving lip service to the concept of collaboration, it has been a part of our DNA at GLOBALFOUNDRIES since our inception.

One of our most important partnerships is in the form of the Common Platform alliance, a groundbreaking collaboration with IBM and Samsung—two of the world’s foremost technology companies—to address the needs of semiconductor manufacturing by providing access to leading-edge CMOS process technologies and extensive enablement support and services. Together we are continuing to redefine the landscape of the semiconductor industry, and the fruits of this partnership will be on display next week at the 2013 Common Platform Technology Forum, which will be held on Tuesday, February 5 at the Santa Clara Convention Center.

The theme of this year’s forum is “Real Collaboration = Big Business.” While we will still be providing a deep look into the underlying technologies offered by the alliance, we also want to demonstrate the impressive business momentum that’s been achieved as a byproduct of this collaboration. 2012 was a particularly strong year, with members of the Common Platform seeing significant growth and taking over both the #2 and #3 spots in the worldwide foundry rankings. Research firm IC Insights recently released its projections for the top 20 leading semiconductor suppliers in 2012, and GLOBALFOUNDRIES jumped six spots to break into the top 20 for the first time. IC Insights projected our 2012 revenue to grow 31% over 2011, which would make us the fastest growing semiconductor company in the world. Similarly, IC Insights’ 2012 foundry rankings saw Samsung make a rapid rise to #3 in the foundry, with a near doubling of foundry revenue for two years in a row.

The forum also will showcase the latest technological advances being delivered to the world’s leading electronics companies. Attendees will see and hear firsthand how the combined expertise of our partners is addressing the most demanding IC design and manufacturing challenges. Our collaborative research and innovative technology development have resulted in an accelerated roadmap and rapid customer adoption, and we’ll touch upon these key highlights:

  • Leading-edge process technologies at 32/28-, 20-, 14-nanometer, and beyond
  • Advanced innovations such as FinFet, design & technology co-optimization, and double patterning
  • A peek into the future of next-generation device innovations being researched: silicon nanowires, carbon nanotubes, and 3D device structures
  • A showcase of our ecosystem partners and Common Platform design, enablement, and implementation offerings in our Partner Pavilion

During the morning session, attendees will have the opportunity to hear keynotes from senior leaders at IBM, Samsung, and GLOBALFOUNDRIES, as well as a special keynote from Dr. Dipesh Patel, Executive Vice President and General Manager of the Physical IP Division at ARM. Dr. Patel will talk about the importance of “partnering for innovation to drive diversity.” Mobile computing is fueling the market demand for diversity, innovation, and expansion of the semiconductor industry, but the challenges being faced by system and SoC designers to meet these requirements in terms of performance, power efficiency, and time-to-market continue to grow in light of advanced manufacturing technologies. Dr. Patel will discuss the importance of a strong ecosystem to deliver the right product on time for commercial success, and why “Real Collaboration” on advanced process technology is a necessary and critical ingredient to address these challenges.

If you aren’t able to attend Tuesday’s event in person, please consider tuning in online via the live webcast, which will also be archived after the event. Details can be found at this link: http://www.commonplatform.com/tf2013

Mike Noonen is Executive Vice President, Worldwide Marketing and Sales, for GLOBALFOUNDRIES. In this role, he is responsible for global customer relationships as well as all marketing, sales, customer engineering and quality functions.

GLOBALFOUNDRIES to Build Leading-Edge R&D Center on Fab 8 Campus

Aerial view of Fab 8 (rendering)

On January 8th, GLOBALFOUNDRIES announced it will soon begin construction on a new research and development facility at the Fab 8 campus.  Featuring more than a half million square feet of flexible space to support a range of technology development and manufacturing activities, the new Technology Development Center (TDC) will play a key role in the company’s strategy to develop innovative semiconductor solutions allowing customers to compete at the leading edge of technology.

TDC site plan

“As the industry shifts from the PC era to a market focused on mobile devices, we have seen increasingly strong interest from customers in migrating to advanced nodes on an accelerated schedule,” said GLOBALFOUNDRIES CEO Ajit Manocha. “To help facilitate this migration, we are making significant investments in strengthening our technology leadership, including growing our workforce and adding new capabilities to make Fab 8 the hub of our global technology operations.  The new TDC will help us bridge between the lab and the fab by taking research conducted with partners and further developing the technologies to make them ready for volume manufacturing.”

The TDC will house a variety of semiconductor development and manufacturing spaces to support the transition to new technology nodes, as well as the development of innovative capabilities to deliver value to customers beyond the traditional approach of shrinking transistors.

The overarching goal of the TDC is to provide a collaborative space to develop end-to-end solutions covering the full spectrum of silicon technology, from new interconnect and packaging technologies that enable three-dimensional (3D) stacking of chips to leading-edge photomasks for Extreme Ultraviolet (EUV) lithography and everything in between. The TDC will also house important post-production capabilities, including ETest, Bump and Probe, which are increasingly needed at the foundry location for fast yield feedback and to support customer business models.

The Fab 8 campus is an ideal home for the company’s leading-edge technology development activities.  The proximity of the IBM Joint Development Alliance activities in East Fishkill and the College of Nanoscale Science and Engineering (CNSE) at the University of Albany, combined with the growing presence of technology development personnel on the Fab 8 campus, have helped make New York’s “Tech Valley” a global center for next-generation technologies.

Renderings of Fab 8 campus with TDC renderings

“This significant expansion demonstrates that the investments we have made in nanotechnology research across New York State are producing the intended return— the creation of high-paying jobs and generation of economic growth that is essential to rebuilding our state,” said New York Governor Andrew M. Cuomo.  “New York has become the world’s hub for advanced semiconductor research and now, the Technology Development Center will further help ensure the innovations developed in New York, in collaboration with our research institutions, are manufactured in New York.”

Speaking about the announcement, CNSE Senior Vice President and CEO Dr. Alain Kaloyeros said, “The expansion of GLOBALFOUNDRIES’ advanced technology and manufacturing capabilities, supported by new investments and location of new high-tech research and development jobs at the College of Nanoscale Science and engineering, will fuel exciting opportunities for both residents and businesses across New York State, in accordance with Governor Cuomo ‘New York Open for Business’ strategy, and continue to pave the way for long-term economic growth and prosperity catalyzed by computer chip innovations.”

The company plans to begin construction in early 2013 with completion targeted for late 2014.  Since breaking ground on Fab 8 in 2009, GLOBALFOUNDRIES has created approximately 2,000 new direct jobs and that number is expected to grow by another 1,000 employees for a total of about 3,000 new jobs by the end of 2014.   

Quick Facts about the TDC

  • Three-level building with approximately 550,000 gross square feet of varying occupancy types
  • Approximately 90,000 square feet of flexible cleanroom space
  • Approximately 108,000 square feet of clean space to support a range of technology development and manufacturing activities
  • The additional investment in the TDC will increase the total capital investment for the Fab 8 campus to approximately $8.5 billion

For more information on the TDC, check out these resources and articles 

Innovation in Design Rules Verification Keeps Scaling on Track

By Mojy Chian

There is an interesting dynamic that occurs in the semiconductor industry when we talk about process evolution, roadmaps and generally attempt to peer into the future. First, we routinely scare ourselves by declaring that scaling can’t continue and that Moore’s Law is dead (a declaration that has happened more often than the famously exaggerated rumors of Mark Twain’s death). Then, we unfailingly impress ourselves by coming up with solutions and workarounds to the show-stopping challenge of the day. Indeed, there has been a remarkable and consistent track record of innovation to keep things on track, even when it appears the end is surely upon us.

But this time we are really serious – at 20nm, the end is near! Ok, maybe not THE end, but for sure there are some obvious things that need to change if we are to keep our record of continuous technical conquest intact. And, as with most things in this era, collaboration is the key.

Mojy Chian explains the role DFM has in keeping scaling on track.

Sure there are lots of really innovative approaches and exotic technologies being bandied about that hold the potential to keep Moore’s Law chugging along well into the future. But ironically, it’s something of an ‘old’ technology that holds significant potential to address the current issues. Design for manufacturing (DFM) has been around for a long time, most typically as a design-enabling tool delivered by EDA companies to help IC designers understand and deal with manufacturers’ geometrical design rules.  This obviously requires close interaction with the EDA people and the foundries so that design rules are accurate and practical. Literally, these are tools that guide designers with a set of geometrical constraints, necessary to guarantee yield, defined over polygonal shapes and edges in the layout. Traditionally, these design rules are binary – this works, this does not.

But something funny happened on our way past 28nm. The Y word – yield – started becoming one of the, if not the, most important factor in successful IC design. This is because of the intrinsic relationship between yield and the complexity of physical design (and the associated challenges of process-related effects).

In the past, a designer only had two primary options for identifying DFM issues: run accurate but computationally intensive simulations based on numerical algorithms, or rely on metrology measurements directly from the fab. Attempts have been made to improve upon standard DRC with additional rules, but these approaches have had mixed success. For example, some have proposed the use of restrictive design rules that only allow highly regular structures for layout, avoiding problematic two-dimensional geometries altogether. The potential drawback is that designers cannot effectively optimize their circuits to meet application requirements with overly constrained design rules.

So the manufacturers got back together with the EDA suppliers and thought about how to solve the problem. “We need to build on what we have achieved with DRC,” we agreed. “We need more.” So in our infinite wisdom, we came up with something called DRC+. The lack of creativity in the name, however, belies the innovation behind it, which is backed by several patents and reinforces the fact that GLOBALFOUNDRIES innovates in ways beyond just manufacturing process technology.

The concept we are moving towards is the reduction in the number of trade-off decisions a designer needs to make. By providing a tool that will notify the user if a forbidden shape has been used, the designer can be guided more efficiently. In addition, things need to be visually intuitive –  a picture is worth of a thousand words, even in IC design. Such a solution requires tight collaboration between the foundry, which supplies a library of yield critical patterns; EDA providers, which supply ultra-fast pattern-matching tools; and the IC design community itself which provides valuable input on design methodologies and real-world needs.

Pattern-based methodology takes hold

In a nutshell. DFM and design rule checking need to move to a pattern-based approach to provide more visibility into variability issues. Traditional DRC is shape and edge proximity based.  On top of that, we need 2D shape-based pattern-matching physical verification.

As a result, our DRC+ takes a different approach than earlier generations of DRC. Instead of restricting the flexibility of designers, the technique augments standard DRC by applying rapid two-dimensional shape-based pattern matching to identify problematic configurations that could be difficult to manufacture.

Our DRC+ platform includes a silicon verified library of “bad” patterns in a database which can be identified quickly in layout, allowing the designer to fix them. This is an on-going incremental process rather than just occurring at the end of the complete design cycle.

Thus, pattern matching with DRC+ introduces process-awareness earlier in the design process, a concept that is at the basis of the collaborative DFM platform from GLOBALFOUNDRIES.

Two rule-based flows are also part of our DFM platform. The first is yield analysis and scoring, in the form of an equation-based tool to help designers quickly analyze their design for usage of recommended rules, and prioritize fixes for the highest impact violations. The second is an automated yield enhancement “layout-fix” application, which applies recommendations without impacting overall design area.

The net result is improved variability management without sacrifices in design performance or significant impact on design productivity (DRC+ is over 10,000 times faster than printability simulation, and its detection and fixing adds very little to the overall routing runtime).

DFM is something of a broad catch-all term for a number of steps and issues involved ensuring a complex IC design can be manufactured and done in a way that is cost-effective and timely. Design rule checking is just one aspect of it, but a critical one for sure. We are proud of the innovation GLOBALFOUNDRIES continues to demonstrate in many areas, including design enablement technologies like our DRC+. In future posts I’ll explore other ideas for improving how manufacturing issues can be brought more tightly into the design process, including a concept we call Design Enabled Manufacturing (DEM). Stay tuned.

Mojy Chian is senior vice president, design enablement at GLOBALFOUNDRIES. He is responsible for global design enablement, services, and solutions and is the primary technical customer interface for the company. 

GLOBALFOUNDRIES Partners with Saratoga County Board of Supervisors to Host Local Career Fair

GLOBALFOUNDRIES and the Saratoga County Board of Supervisors will co-host a local career fair at the Saratoga County Administration Building on Thursday, January 12, 2012 from 4:00 to 7:00 p.m. ET.

The event is designed to match local candidates with current open positions at Fab 8 and to meet with GLOBALFOUNDRIES team members to understand how to best prepare for future career opportunities within the semiconductor industry.

Fab 8 has created more than 1,000 new jobs in Saratoga County and is expected to create over 400 additional new positions by the end of the year.  The company is recruiting locally to fill open positions in 2012 and for future hiring needs.  Today, approximately 50 percent of the company’s new hires for the Fab 8 project have been hired from New York with about 50 percent being relocated from outside the region and outside the country. As a truly global company, the GLOBALFOUNDRIES workforce in Saratoga County currently represents almost 30 different countries.

Since breaking ground on Fab 8 in 2009, GLOBALFOUNDRIES has been working with local partners, including the State of New York, the New York State Department of Labor, the Center for Economic Growth, and local universities and community colleges, to attract and recruit qualified local candidates to fill the estimated total 1,400 new jobs needed at the new facility. The career fair event on January 12th is the first event to be co-hosted with the Saratoga County Board of Supervisors and is part of the company’s efforts to fill open positions with qualified local candidates.

The Fab 8 facility, which is currently in the process of ramping to full production, is expected to be the most technologically advanced semiconductor manufacturing facility, or wafer fab, in the world and the largest leading-edge semiconductor foundry in the United States.